Course Schedule
Students are required to complete a total of 25 credits of courses, including 18 credits of Core Courses, 3 credits of Elective Courses and 4 credits of Guided Chip Design Project. Subject to prior approval of the Program Director, students may take a maximum of 9 credits of courses offered by other MSc programs.
Tentative course offering schedule
2024-25 Fall Term
- (Core) EESM 5000 CMOS VLSI Design
- (Core) EESM 5060 Embedded Systems
- (Core) EESM 5100 Analog IC Analysis and Design
- (Core) EESM 5200 Semiconductor Devices for Integrated Circuit Designs
2024-25 Winter Term
- (Core) EESM 6970 Guided Chip Design Project
Course Description of EESM 6970 Guided Chip Design Project
The class is designed to provide students with an experience of the complete IC design process in the industry from product definition to production and measurement. Taking a product in the market as an example, students are going to re-design the chip all the way from system definition, protocol design, selecting technology, installing technology file, digital building block design, analog building block design, digital analogy integration, ESD protection, post-design simulation, and tape out process. After that, the students will perform on-wafer testing, failure analysis, package selection, PCB design, test vector generation, reliability screening, ESD testing and data-sheet writing. Students completing this class are expected to have the equivalent experience of completing a full IC design cycle in the industry.
2024-25 Spring Term
- (Core) EESM 5020 Digital VLSI System Design and Design Automation
- (Core) EESM 5120 Advanced Analog IC Analysis and Design
- (Core) EESM 6970 Guided Chip Design Project (cont.)
- (Elective) EESM 5310 Power Management Circuits and Systems
- (Elective) EESM 6000B (previous code: EESM5900S) Special Topic: Engineering Thinking: From Research to Entrepreneurship
- (Elective) EESM 6000C Special Topic: System-on-Chip (SoC) Laboratory
- (Elective) EESM 6000D Special Topic: Analog IC Design: From Theory to Industry Practice
Course Description of EESM 6000B (previous code: 5900S) Special Topics: Engineering Thinking: From Research to Entrepreneurship
This course aims to introduce you to the fundamental principles of engineering thinking and its application in research and entrepreneurship. Throughout the course, you will explore the creative process of generating ideas, formulating problems, and finding solutions through research. Additionally, you will learn how to identify the unique value of a solution and its potential for commercialization. The course will cover a wide range of topics, including creative thinking, idea generation, intellectual property, funding acquisition, presentation skill, legal procedures, branding, and team management. By the end of the course, you will have gained a preliminary understanding of the engineering innovation process and the skills and knowledge necessary to transform an idea into a successful business venture.
Course Description of EESM 6000C Special Topics: System-on-Chip (SoC) Laboratory
System on Chip (SoC) Design is a comprehensive course focusing on integrating and optimizing the four essential components of an SoC: processor, memory, interconnect, and peripherals. Through theoretical lectures and hands-on labs using open-sourced SoC designs like Caravel SoC, students will gain practical experience in hardware and software co-design. The final project will challenge students to design a workload-optimized SoC. Given a workload comprising CPU computation and IO processing tasks, students will design accelerated hardware components to optimize performance.
Upon completing this course, students will possess the knowledge and skills necessary to design and optimize complex SoCs, enabling them to tackle real-world challenges in embedded systems development, IoT, and consumer electronics.
Course Description of EESM 6000D Special Topics: Analog IC Design: From Theory to Industry Practice
In today's rapidly changing semiconductor industry, designing high-performance and reliable analog ICs is essential. Under CMOS technology scaling, reliability (e.g., electrostatic discharge and latch-up) is degraded by device structures and stronger parasitic elements, and the analog performance is affected by short-channel effects, layout-dependent effects, and random process variations. Throughout this course, students will explore how the above factors impact the analog circuit performance and reliability, and learn both the theories and the industrial practices to address these problems.
Pre-requisite: EESM5100
Exclusion: ELEC4010O
All courses are offered subject to needs and availability. For the latest list of courses to be offered, visit Class Schedule & Quota.
For course details, please refer to Course Catalog.
(Updated on 7 January 2025)